MIPS Instruction Decoding












1















I'm trying to understand how to decode MIPS binary instructions.



I compiled a hello world program in C on a Debian MIPS system with gcc and objdump shows me that the first instruction in the .text section is:



600: 03e00025 move zero,ra



I don't understand how it determines that this is the MOVE instruction.



03e00025 is 00000011111000000000000000100101 in binary. If I understand correctly the first 6 bits here are the opcode, which in this case is all 0, meaning it's an R-type instruction, so we have to look at the last 6 bits, which is 100101. Looking at the MIPS Instruction Set Manual it looks like this should be the OR instruction. I can't even find MOVE in that manual.



Googling for this I found that apparently there are "pseudo" instructions in the assembly, and supposedly move $t, $s expands to addiu $t, $s, 0, but if I look in the manual ADDIU has opcode 001001. Another result I found claims it translates to ADD but the last six bits of ADD should be 100000, so that doesn't fit either.



What am I missing?










share|improve this question




















  • 1





    Yes that is encoded as or $0, $ra, $0.

    – Jester
    Nov 23 '18 at 23:58
















1















I'm trying to understand how to decode MIPS binary instructions.



I compiled a hello world program in C on a Debian MIPS system with gcc and objdump shows me that the first instruction in the .text section is:



600: 03e00025 move zero,ra



I don't understand how it determines that this is the MOVE instruction.



03e00025 is 00000011111000000000000000100101 in binary. If I understand correctly the first 6 bits here are the opcode, which in this case is all 0, meaning it's an R-type instruction, so we have to look at the last 6 bits, which is 100101. Looking at the MIPS Instruction Set Manual it looks like this should be the OR instruction. I can't even find MOVE in that manual.



Googling for this I found that apparently there are "pseudo" instructions in the assembly, and supposedly move $t, $s expands to addiu $t, $s, 0, but if I look in the manual ADDIU has opcode 001001. Another result I found claims it translates to ADD but the last six bits of ADD should be 100000, so that doesn't fit either.



What am I missing?










share|improve this question




















  • 1





    Yes that is encoded as or $0, $ra, $0.

    – Jester
    Nov 23 '18 at 23:58














1












1








1








I'm trying to understand how to decode MIPS binary instructions.



I compiled a hello world program in C on a Debian MIPS system with gcc and objdump shows me that the first instruction in the .text section is:



600: 03e00025 move zero,ra



I don't understand how it determines that this is the MOVE instruction.



03e00025 is 00000011111000000000000000100101 in binary. If I understand correctly the first 6 bits here are the opcode, which in this case is all 0, meaning it's an R-type instruction, so we have to look at the last 6 bits, which is 100101. Looking at the MIPS Instruction Set Manual it looks like this should be the OR instruction. I can't even find MOVE in that manual.



Googling for this I found that apparently there are "pseudo" instructions in the assembly, and supposedly move $t, $s expands to addiu $t, $s, 0, but if I look in the manual ADDIU has opcode 001001. Another result I found claims it translates to ADD but the last six bits of ADD should be 100000, so that doesn't fit either.



What am I missing?










share|improve this question
















I'm trying to understand how to decode MIPS binary instructions.



I compiled a hello world program in C on a Debian MIPS system with gcc and objdump shows me that the first instruction in the .text section is:



600: 03e00025 move zero,ra



I don't understand how it determines that this is the MOVE instruction.



03e00025 is 00000011111000000000000000100101 in binary. If I understand correctly the first 6 bits here are the opcode, which in this case is all 0, meaning it's an R-type instruction, so we have to look at the last 6 bits, which is 100101. Looking at the MIPS Instruction Set Manual it looks like this should be the OR instruction. I can't even find MOVE in that manual.



Googling for this I found that apparently there are "pseudo" instructions in the assembly, and supposedly move $t, $s expands to addiu $t, $s, 0, but if I look in the manual ADDIU has opcode 001001. Another result I found claims it translates to ADD but the last six bits of ADD should be 100000, so that doesn't fit either.



What am I missing?







assembly mips elf disassembly objdump






share|improve this question















share|improve this question













share|improve this question




share|improve this question








edited Nov 23 '18 at 23:59









Peter Cordes

128k18190326




128k18190326










asked Nov 23 '18 at 23:33









StefanStefan

60028




60028








  • 1





    Yes that is encoded as or $0, $ra, $0.

    – Jester
    Nov 23 '18 at 23:58














  • 1





    Yes that is encoded as or $0, $ra, $0.

    – Jester
    Nov 23 '18 at 23:58








1




1





Yes that is encoded as or $0, $ra, $0.

– Jester
Nov 23 '18 at 23:58





Yes that is encoded as or $0, $ra, $0.

– Jester
Nov 23 '18 at 23:58












1 Answer
1






active

oldest

votes


















1














MIPS machine code doesn't have a specific opcode for move, but for the convenience of humans, many assemblers support pseudo-instructions like li, la, and move that assemble to one or more real machine instructions. addiu is a common one.



It would be totally correct for objdump to decode the instruction as or $0, $ra, $0 (according to Jester) to show you how it's actually encoded.



For some purposes it makes sense for a disassembler to decode any of the commonly used ways to copy a register into a move mnemonic. Adding or ORing an immediate 0, or a zero from reading the $zero register, do nothing to the value so it's copied unchanged.



When reading the asm, you normally don't care whether it's or, ori, addiu $0, $ra, 0, or whatever.





Different assemblers might use different implementations for the move pseudo-instruction, or hand-written asm could use any of them. I don't think there are any performance consequences either way. So the details of which machine instruction is used to implement a move depends on the assembler.





I'm not sure what the point of a move with a destination of $zero is. That would be a no-op, because $zero discards writes. (It's the CPU-register equivalent of /dev/zero)






share|improve this answer
























  • Oh wow, awesome answer! Now I get it :-) Thank you very much!

    – Stefan
    Nov 24 '18 at 0:47











Your Answer






StackExchange.ifUsing("editor", function () {
StackExchange.using("externalEditor", function () {
StackExchange.using("snippets", function () {
StackExchange.snippets.init();
});
});
}, "code-snippets");

StackExchange.ready(function() {
var channelOptions = {
tags: "".split(" "),
id: "1"
};
initTagRenderer("".split(" "), "".split(" "), channelOptions);

StackExchange.using("externalEditor", function() {
// Have to fire editor after snippets, if snippets enabled
if (StackExchange.settings.snippets.snippetsEnabled) {
StackExchange.using("snippets", function() {
createEditor();
});
}
else {
createEditor();
}
});

function createEditor() {
StackExchange.prepareEditor({
heartbeatType: 'answer',
autoActivateHeartbeat: false,
convertImagesToLinks: true,
noModals: true,
showLowRepImageUploadWarning: true,
reputationToPostImages: 10,
bindNavPrevention: true,
postfix: "",
imageUploader: {
brandingHtml: "Powered by u003ca class="icon-imgur-white" href="https://imgur.com/"u003eu003c/au003e",
contentPolicyHtml: "User contributions licensed under u003ca href="https://creativecommons.org/licenses/by-sa/3.0/"u003ecc by-sa 3.0 with attribution requiredu003c/au003e u003ca href="https://stackoverflow.com/legal/content-policy"u003e(content policy)u003c/au003e",
allowUrls: true
},
onDemand: true,
discardSelector: ".discard-answer"
,immediatelyShowMarkdownHelp:true
});


}
});














draft saved

draft discarded


















StackExchange.ready(
function () {
StackExchange.openid.initPostLogin('.new-post-login', 'https%3a%2f%2fstackoverflow.com%2fquestions%2f53453890%2fmips-instruction-decoding%23new-answer', 'question_page');
}
);

Post as a guest















Required, but never shown

























1 Answer
1






active

oldest

votes








1 Answer
1






active

oldest

votes









active

oldest

votes






active

oldest

votes









1














MIPS machine code doesn't have a specific opcode for move, but for the convenience of humans, many assemblers support pseudo-instructions like li, la, and move that assemble to one or more real machine instructions. addiu is a common one.



It would be totally correct for objdump to decode the instruction as or $0, $ra, $0 (according to Jester) to show you how it's actually encoded.



For some purposes it makes sense for a disassembler to decode any of the commonly used ways to copy a register into a move mnemonic. Adding or ORing an immediate 0, or a zero from reading the $zero register, do nothing to the value so it's copied unchanged.



When reading the asm, you normally don't care whether it's or, ori, addiu $0, $ra, 0, or whatever.





Different assemblers might use different implementations for the move pseudo-instruction, or hand-written asm could use any of them. I don't think there are any performance consequences either way. So the details of which machine instruction is used to implement a move depends on the assembler.





I'm not sure what the point of a move with a destination of $zero is. That would be a no-op, because $zero discards writes. (It's the CPU-register equivalent of /dev/zero)






share|improve this answer
























  • Oh wow, awesome answer! Now I get it :-) Thank you very much!

    – Stefan
    Nov 24 '18 at 0:47
















1














MIPS machine code doesn't have a specific opcode for move, but for the convenience of humans, many assemblers support pseudo-instructions like li, la, and move that assemble to one or more real machine instructions. addiu is a common one.



It would be totally correct for objdump to decode the instruction as or $0, $ra, $0 (according to Jester) to show you how it's actually encoded.



For some purposes it makes sense for a disassembler to decode any of the commonly used ways to copy a register into a move mnemonic. Adding or ORing an immediate 0, or a zero from reading the $zero register, do nothing to the value so it's copied unchanged.



When reading the asm, you normally don't care whether it's or, ori, addiu $0, $ra, 0, or whatever.





Different assemblers might use different implementations for the move pseudo-instruction, or hand-written asm could use any of them. I don't think there are any performance consequences either way. So the details of which machine instruction is used to implement a move depends on the assembler.





I'm not sure what the point of a move with a destination of $zero is. That would be a no-op, because $zero discards writes. (It's the CPU-register equivalent of /dev/zero)






share|improve this answer
























  • Oh wow, awesome answer! Now I get it :-) Thank you very much!

    – Stefan
    Nov 24 '18 at 0:47














1












1








1







MIPS machine code doesn't have a specific opcode for move, but for the convenience of humans, many assemblers support pseudo-instructions like li, la, and move that assemble to one or more real machine instructions. addiu is a common one.



It would be totally correct for objdump to decode the instruction as or $0, $ra, $0 (according to Jester) to show you how it's actually encoded.



For some purposes it makes sense for a disassembler to decode any of the commonly used ways to copy a register into a move mnemonic. Adding or ORing an immediate 0, or a zero from reading the $zero register, do nothing to the value so it's copied unchanged.



When reading the asm, you normally don't care whether it's or, ori, addiu $0, $ra, 0, or whatever.





Different assemblers might use different implementations for the move pseudo-instruction, or hand-written asm could use any of them. I don't think there are any performance consequences either way. So the details of which machine instruction is used to implement a move depends on the assembler.





I'm not sure what the point of a move with a destination of $zero is. That would be a no-op, because $zero discards writes. (It's the CPU-register equivalent of /dev/zero)






share|improve this answer













MIPS machine code doesn't have a specific opcode for move, but for the convenience of humans, many assemblers support pseudo-instructions like li, la, and move that assemble to one or more real machine instructions. addiu is a common one.



It would be totally correct for objdump to decode the instruction as or $0, $ra, $0 (according to Jester) to show you how it's actually encoded.



For some purposes it makes sense for a disassembler to decode any of the commonly used ways to copy a register into a move mnemonic. Adding or ORing an immediate 0, or a zero from reading the $zero register, do nothing to the value so it's copied unchanged.



When reading the asm, you normally don't care whether it's or, ori, addiu $0, $ra, 0, or whatever.





Different assemblers might use different implementations for the move pseudo-instruction, or hand-written asm could use any of them. I don't think there are any performance consequences either way. So the details of which machine instruction is used to implement a move depends on the assembler.





I'm not sure what the point of a move with a destination of $zero is. That would be a no-op, because $zero discards writes. (It's the CPU-register equivalent of /dev/zero)







share|improve this answer












share|improve this answer



share|improve this answer










answered Nov 24 '18 at 0:08









Peter CordesPeter Cordes

128k18190326




128k18190326













  • Oh wow, awesome answer! Now I get it :-) Thank you very much!

    – Stefan
    Nov 24 '18 at 0:47



















  • Oh wow, awesome answer! Now I get it :-) Thank you very much!

    – Stefan
    Nov 24 '18 at 0:47

















Oh wow, awesome answer! Now I get it :-) Thank you very much!

– Stefan
Nov 24 '18 at 0:47





Oh wow, awesome answer! Now I get it :-) Thank you very much!

– Stefan
Nov 24 '18 at 0:47




















draft saved

draft discarded




















































Thanks for contributing an answer to Stack Overflow!


  • Please be sure to answer the question. Provide details and share your research!

But avoid



  • Asking for help, clarification, or responding to other answers.

  • Making statements based on opinion; back them up with references or personal experience.


To learn more, see our tips on writing great answers.




draft saved


draft discarded














StackExchange.ready(
function () {
StackExchange.openid.initPostLogin('.new-post-login', 'https%3a%2f%2fstackoverflow.com%2fquestions%2f53453890%2fmips-instruction-decoding%23new-answer', 'question_page');
}
);

Post as a guest















Required, but never shown





















































Required, but never shown














Required, but never shown












Required, but never shown







Required, but never shown

































Required, but never shown














Required, but never shown












Required, but never shown







Required, but never shown







Popular posts from this blog

Costa Masnaga

Fotorealismo

Sidney Franklin